2-to-4 Line Decoder

New name

Iterations of logic design (just sketching---no real theory applied).
{TOC}
! Version 1 - Clunky, but works
{{
$ 1 5.0E-6 10.20027730826997 50 5.0 50
L 160 144 112 144 0 0 false 5.0 0.0
L 160 208 112 208 0 0 false 5.0 0.0
M 432 64 480 64 0 2.5
M 432 144 480 144 0 2.5
M 432 224 480 224 0 2.5
M 432 304 480 304 0 2.5
150 352 64 416 64 0 2 0.0
153 352 304 416 304 0 2 5.0
150 352 224 416 224 0 2 0.0
150 352 144 416 144 0 2 0.0
I 304 160 352 160 0 0.5
I 304 208 352 208 0 0.5
w 352 320 160 320 0
w 160 320 160 208 0
w 352 288 192 288 0
w 192 288 192 144 0
w 192 144 160 144 0
w 160 208 224 208 0
w 224 208 224 240 0
w 224 240 352 240 0
w 304 208 256 208 0
w 256 208 256 144 0
w 256 144 192 144 0
w 304 160 160 160 0
w 160 160 160 208 0
w 160 144 160 128 0
w 160 128 352 128 0
w 352 80 224 80 0
w 224 80 224 208 0
w 352 48 160 48 0
w 160 48 160 128 0
w 416 64 432 64 0
w 416 144 432 144 0
w 416 224 432 224 0
w 416 304 432 304 0
x 202 23 413 29 0 24 2-to-4 Line Decoder
}}
! Version 2 - A little more elegant (using Ands only)
{{
$ 1 5.0E-6 10.20027730826997 50 5.0 50
L 160 128 112 128 0 1 false 5.0 0.0
L 160 192 112 192 0 1 false 5.0 0.0
M 432 48 480 48 0 2.5
M 432 128 480 128 0 2.5
M 432 208 480 208 0 2.5
M 432 288 480 288 0 2.5
150 352 48 416 48 0 2 5.0
150 352 208 416 208 0 2 0.0
150 352 128 416 128 0 2 0.0
I 304 144 352 144 0 0.5
I 304 192 352 192 0 0.5
w 160 304 160 192 0
w 192 272 192 128 0
w 192 128 160 128 0
w 160 192 224 192 0
w 224 192 224 224 0
w 224 224 352 224 0
w 304 192 256 192 0
w 256 192 256 128 0
w 256 128 192 128 0
w 304 144 160 144 0
w 160 144 160 192 0
w 160 128 160 112 0
w 160 112 352 112 0
w 352 64 224 64 0
w 224 64 224 192 0
w 352 32 160 32 0
w 160 32 160 112 0
w 416 48 432 48 0
w 416 128 432 128 0
w 416 208 432 208 0
w 416 288 432 288 0
x 202 7 413 13 0 24 2-to-4 Line Decoder
I 304 272 352 272 0 0.5
I 304 304 352 304 0 0.5
w 192 272 304 272 0
w 160 304 304 304 0
150 352 288 416 288 0 2 0.0
}}
! Version 3 - 2 Inverters and 4 Ands
{{
$ 1 5.0E-6 10.20027730826997 50 5.0 50
L 160 96 112 96 0 1 false 5.0 0.0
L 160 224 112 224 0 0 false 5.0 0.0
M 432 32 480 32 0 2.5
M 432 112 480 112 0 2.5
M 432 192 480 192 0 2.5
M 432 272 480 272 0 2.5
150 352 32 416 32 0 2 0.0
150 352 192 416 192 0 2 0.0
150 352 112 416 112 0 2 5.0
w 416 32 432 32 0
w 416 112 432 112 0
w 416 192 432 192 0
w 416 272 432 272 0
150 352 272 416 272 0 2 0.0
w 336 128 352 128 0
w 336 256 352 256 0
w 208 176 160 224 0
w 192 64 160 96 0
w 160 224 192 256 0
w 160 96 192 128 0
I 192 256 240 256 0 0.5
I 192 128 240 128 0 0.5
w 240 256 272 288 0
w 272 288 352 288 0
w 240 128 272 160 0
w 272 160 272 224 0
w 272 224 304 256 0
w 304 256 336 256 0
w 304 176 336 208 0
w 336 208 352 208 0
w 192 64 240 64 0
w 240 64 288 16 0
w 288 16 352 16 0
w 336 48 352 48 0
w 240 64 272 80 0
w 272 80 288 96 0
w 288 96 352 96 0
w 304 80 336 48 0
w 208 176 304 176 0
w 304 176 304 80 0
w 240 256 240 160 0
w 240 160 272 128 0
w 272 128 336 128 0
w 272 160 320 160 0
w 320 160 336 176 0
w 336 176 352 176 0
}}

! Version 4 - Demorgan's Theory applied to Version 3
{{
$ 1 5.0E-6 10.20027730826997 50 5.0 50
L 160 96 112 96 0 1 false 5.0 0.0
L 160 224 112 224 0 0 false 5.0 0.0
M 432 32 480 32 0 2.5
M 432 112 480 112 0 2.5
M 432 192 480 192 0 2.5
M 432 272 480 272 0 2.5
w 416 32 432 32 0
w 416 112 432 112 0
w 416 192 432 192 0
w 416 272 432 272 0
w 336 128 352 128 0
w 336 256 352 256 0
w 192 176 160 224 0
w 192 64 160 96 0
w 160 224 192 256 0
w 160 96 192 128 0
I 192 176 240 176 0 0.5
I 192 64 240 64 0 0.5
w 240 256 272 288 0
w 272 288 352 288 0
w 240 128 272 160 0
w 272 160 272 224 0
w 272 224 304 256 0
w 304 256 336 256 0
w 304 176 336 208 0
w 336 208 352 208 0
w 192 128 240 128 0
w 240 64 288 16 0
w 288 16 352 16 0
w 336 48 352 48 0
w 240 64 272 80 0
w 272 80 288 96 0
w 288 96 352 96 0
w 304 80 336 48 0
w 240 176 304 176 0
w 304 176 304 80 0
w 240 256 240 160 0
w 240 160 272 128 0
w 272 128 336 128 0
w 272 160 320 160 0
w 320 160 336 176 0
w 192 256 240 256 0
153 352 272 416 272 0 2 0.0
153 352 192 416 192 0 2 0.0
153 352 112 416 112 0 2 5.0
153 352 32 416 32 0 2 0.0
w 336 176 352 176 0
}}

! Conclusion

Version 3 is probably as good as I expect to get it. I Googled around and saw several implementations just like it (except with less complex-looking paths).

! Post-conclusion

Later, I find that the Falstad simulator comes with a sample circuit that does this, only under a slightly different name. The "Combinatorial Logic -> [1-of-4 Decoder|http://panoptic.com/rking/falstad/e-decoder.html]" does exactly as Version 3 (though with cleaned-up lines).

Password Summary of changes

For Our King, Only

2-to-4 Line Decoder